This report covers direct power injection of 8051-based microcontrollers. A test bench has been designed according to IEC 6213204 standards to test how high frequency signals impact the response of microcontroller circuits in operation. Two microcontroller circuits (Atmel LP2052 and LP216) were tested to the point of upset. Upset is defined as a reduction in voltage or shift in timing from the least significant (LSB) bit output pin (P1.0) of the microcontroller. The chip was exposed to a radio frequency (RF) signal using the direct injection method. A total of five chips were exposed to a continuous wave (CW) signal for up to 1 microsecond. At least 100 shots of pulsed power were applied to the chip from 50 to 200 MHz and each pulsed time based on a single clock cycle. The RF signal applied to the microcontroller in pulse widths of 0.24, 0.48 or 1 microsecond. Each pulse was injected based on target locations or timing positions with respect to the microcontroller clock cycle. Because upsets are different than device failure tests, a probabilistic method was used to establish what power level affected the circuit. This information was converted to probability of effects curves and compared over frequency and the type of board that was used to test the microcontroller.

关键词：芯片(电子)；连续波；无线电信号

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Using van der Pauw and microwave surface resistance measurements, a series of temperature-dependent data sets from carbon nanotube (CNT) thin films have been measured. The test structures were fabricated using photolithography, E-beam evaporation, and a novel CNT network deposition technique. The sheet resistance and resistivity of each sample were recorded at temperatures ranging from 0 60 C with test currents ranging from 100 nA to 100 A. These values demonstrated excellent linearity, with no dependence on currents. At room temperature, the sheet resistance yielded a negative temperature coefficient (of approximately 900 ppm/ C). Our objective is to analyze the effect that DC and microwave currents have on CNT thin films using a two-point measurement technique on Corbino discs and in the presence of microwaves (8 12 GHz) to determine at which temperatures a CNT thin film performs best and identify the ideal temperature range in which a CNT microchip yields the maximized sheet resistance. The results counter the trend found by the four-point measurements; a positive temperature coefficient was observed. This observation indicates the temperature coefficient of the material is actually dependent on the size of the sample tested.

关键词：芯片；直流电子束；霍尔效应；温度系数

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A modified configuration for a THz stage has been designed, fabricated and assembled with the final goal to combine the THz spectrometer with a microfluidic platform for characterization of biological samples in solutions. The new stage accommodates a modified optical mounting system that focuses THz radiation on micro/nanofluidic chips with reduced size of 1.5 mm x 3.0 mm for the active region, encompassing 10 sample channels in parallel. Another important improvement to the stage is modified linear positioning of the microdetector with a probe relative to the microfluidic chip in a near field configuration. A significant change in the software for computer controlled operation has also been made. We continued protocol development for spectroscopic characterization of biomaterials using micro/nanofluidic chips. The algorithm for amplitude and frequency shift corrections has been investigated and tested. The possibility to further improve spectral resolution has been demonstrated.

关键词：芯片；光谱系统；生物传感器

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In this project we have investigated the potential of nanofluidic lab-on-chip technology to be used as platforms for free-flow separation, concentration, and identification of biomolecules. Specifically, the goals of this project have been to: 1) demonstrate Field Amplified Sample Stacking (FASS) for specific DNA samples, and 2) demonstrate identification of target single stranded DNA (ssDNA) from a complex mixture of DNA, containing strands of different composition and size. We have achieved both goals and, in some cases, expanded the investigation from the original tasks. The results of our studies, elaborated in the following sections, suggest that lab-on-chip nanofluidic platforms may enable rapid and inexpensive, characterization and analysis of DNA biomarkers. Advantages include overall ease of operation of the device, which does not require loading of gels as sieving matrices; inexpensive analysis, as the only reagents required are water-based buffers; fast identification, since sample signatures can be produced in the order of less than a minute. Findings from this work have resulted in peer-reviewed publications (one conference and one journal paper). Potential target applications of our identification platform include analysis of DNA biomarkers for environmental pollutants or early disease diagnosis: analysis of mitochondrial DNA for forensic identification: investigation of protein kinetics.

关键词：芯片；奈米流体；DNA芯片

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The public reporting burden for this collection of information is estimated to average 1 hour per response, including the time for reviewing instructions,searching existing data sources, gathering and maintaining the data needed, and completing and reviewing the collection of information. Send comments regarding this burden estimate or any other aspect of this collection of information, including suggesstions for reducing this burden, to Washington Headquarters Services, Directorate for Information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington VA, 22202-4302. Respondents should be aware that notwithstanding any other provision of law, no person shall be subject to any oenalty for failing to comply with a collection of information if it does not display a currently valid OMB control number.

关键词：芯片；图像处理；现有设备

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Various SiC electronics and sensors are currently under development for applications in 500C high temperature environments such as hot sections of aerospace engines and the surface of Venus. In order to conduct long-term test and eventually commercialize these SiC devices, compatible packaging technologies for the SiC electronics and sensors are required. This presentation reviews packaging technologies developed for 500C SiC electronics and sensors to address both component and subsystem level packaging needs for high temperature environments. The packaging system for high temperature SiC electronics includes ceramic chip-level packages, ceramic printed circuit boards (PCBs), and edge-connectors. High temperature durable die-attach and precious metal wire-bonding are used in the chip-level packaging process. A high temperature sensor package is specifically designed to address high temperature micro-fabricated capacitive pressure sensors for high differential pressure environments. This presentation describes development of these electronics and sensor packaging technologies, including some testing results of SiC electronics and capacitive pressure sensors using these packaging technologies.

关键词：芯片；高温环境；压力传感器

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Solid State Lighting is a cost-effective, energy-conserving technology serving a rapidly expanding multi-billion dollar market. This program was designed to accelerate this lighting revolution by reducing the manufacturing cost of Illumination-Grade LEDs. The technical strategy was to investigate growth substrate alternatives to standard planar sapphire, select the most effective and compatible option, and demonstrate a significant increase in Lumen/$ with a marketable LED. The most obvious alternate substrate, silicon, was extensively studied in the first two years of the program. The superior thermal and mechanical properties of Si were expected to improve wavelength uniformity and hence color yield in the manufacture of high-power illumination-grade LEDs. However, improvements in efficiency and epitaxy uniformity on standard c-plane sapphire diminished the advantages of switching to Si. Furthermore, the cost of sapphire decreased significantly and the cost of processing Si devices using our thin film process was higher than expected. We concluded that GaN on Si was a viable technology but not a practical option for Philips Lumileds. Therefore in 2012 and 2013, we sought and received amendments which broadened the scope to include other substrates and extended the time of execution. Proprietary engineered substrates, off-axis (non-c-plane) sapphire, and c-plane patterned sapphire substrates (PSS) were all investigated in the final 18 months of this program. Excellent epitaxy quality was achieved on all three candidates; however we eliminated engineered substrates and non-c-plane sapphire because of their higher combined cost of substrate, device fabrication and packaging. Ultimately, by fabricating a flip-chip (FC) LED based upon c-plane PSS we attained a 42% reduction in LED manufacturing cost relative to our LUXEON Rebel product (Q1-2012). Combined with a flux gain from 85 to 102 Lm, the LUXEON Q delivered a 210% increase in Lm/$ over this time period. The technology was commercialized in our LUXEON Q product in Sept., 2013. Also, the retention of the sapphire increased the robustness of the device, enabling sales of low-cost submount-free chips to lighting manufacturers. Thus, blue LED die sales were initiated in the form of a PSS-FC in February, 2013.

关键词：光芯片；成本效益；力学性能

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The interim report describes an initial effort to fabricate an Integrated Photonic Circuit (IPC) which provides a means for converting an optical laser signal, that consists of both a narrow-line carrier wavelength and a heterodyned RF signal that are in-phase, to an electrical RF signal that can drive various on-chip components such as an antenna. The IPC would supply a critical missing element for enabling new phased-array radar based on an all- optical architecture. Ge-on-Si technology, the focus of the effort, has specific advantages that are fundamental to nearly all integrated photonic circuits. Its direct energy bandgap, slightly larger than Ge s indirect bandgap, permits band-to-band recombination/generation at an energy that corresponds to light near the standard optical communications wavelength. Ge-on-Si technology, therefore, could enable a host of IPC subcomponents including photodetectors, laser diodes, and enhanced silicon modulators. In addition, such germanium devices can be simply and inexpensively incorporated into a silicon manufacturing process.

关键词：芯片；射频脉冲；集成系统；光通信

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NASA's Genesis solar wind sample return mission experienced an off nominal landing resulting in broken, albeit useful collectors. Sample 60000 from the collector is comprised of diamond-like-carbon film on a float zone (FZ) silicon wafer substrate Diamond-on-Silicon (DOS), and is highly prized for its higher concentration of solar wind (SW) atoms. A team of scientist at the Johnson Space Center was charged with determining the best, nondestructive and noncontaminating method to subdivide the specimen that would result in a 1 sq. cm subsample for allocation and analysis. Previous work included imaging of the SW side of 60000, identifying the crystallographic orientation of adjacent fragments, and devising an initial cutting plan.

关键词：芯片；成像技术；样本返回任务

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In this paper one convetional and two novel designs of 4-bit LCADCs are presented and simulated. The performance of these three circuits are estimated using CadenceVirtuoso?circuit simulation software to model the circuits at the transistor level. The three circuits are then compared in terms of timing accuracy, reference voltage accuracy, total power consumed, and total required area. The proposed integrator LCADC was found to have the lowest power consumption and the least error over one cycle but accumulated error over time. The proposed track and hold LCADC had slightly more timing error and power consumption, but it did not accumulate error and required significantly less area. Therefore the track and hold LCADC was chosen as the best implementation of the three studied in this paper.

关键词：平交路口能耗；芯片面积；测量精度

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