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低功率应用程序的带带穿隧晶体管设计与建模
Band-to-Band Tunnel Transistor Design and Modeling for Low Power Applications
Chapter 1. Introduction
1.1 Power Consumption Becoming a Major Concern
1.2 Possible Solution
1.3 Thesis Outline
1.4 References
Chapter 2. Modeling of Band-to-Band Tunneling
2.1 Introduction
2.2 Model Development
2.3 Comparison to Simulation
2.4 Summary
2.5 References
Chapter 3. Silicon P-I-N Structure TFET
3.1 Introduction
3.2 Silicon P-I-N Structure TFET Process Flow Setup
3.3 Silicon P-I-N TFET Analysis
3.4 Summary
3.5 References
Chapter 4. Achieving sub-60mV/dec Subthreshold Swing
4.1 Introduction
4.2 Silicided Source TFET Fabrication
4.3 Analysis of the Silicided Source TFET
4.4 Subthreshold Swing Data Quality Analysis
4.5 Selective Silicide Using Germanium
4.6 Summary
4.7 References
Chapter 5. Improving the ON Current
5.1 Introduction
5.2 P-I-N TFET with High ION using Spike+Flash Anneal
5.3 Undoped Vertical Pocket Structure TFET
5.4 Summary
5.5 References
Chapter 6. Si/Ge Hetero-structure TFETs
6.1 Introduction
6.2 Germanium P-I-N Structure TFET
6.3 Si/Ge Hetero-structure TFET
6.3.1 Germanium Source Hetero-tructure TFET
6.3.2 Germanium Channel Hetero-structure TFET
6.4 Si/Ge Strained Hetero-structure TFET
6.4.1 Vertical Pocket Strained Hetero-structure TFET
6.4.2 Lateral Strained Hetero-structure TFET
6.4.3 Strained Germanium Epitaxial Growth Experiments
6.5 Summary
6.6 References
Chapter 7. Conclusions
7.1 Summary of Work
7.2 Future Directions
7.3 References