关键词：模拟到数字转换器；SAR；低功耗；低压；无线个域网
摘 要：This paper presents a low power low voltage 7bit 16MS/s SAR ADC (successive approximation register analog-to-digital converter) for the application of ZigBee receiver.The proposed 7-bit ADC is designed and simulated in 180nm RF CMOS technology.Post simulation results show that at 1.0-V supply and 16 MS/s,the ADC achieves a SNDR (signal-to-noise-anddistortion ratio) and SFDR (Spurious Free Dynamic Range) are 43.6dB,57.4dB respectively.The total power dissipation is 228tW,and it occupies a chip area of 0.525 mm2.It results in a figure-of merit (FOM) of 0.11 p J/step.