关键词：电子信息；集成电路；三维；数据转换
摘 要：Three-dimensional integration is an emerging chip fabrication technique in which multiple integrated circuit dies are joined using conductive posts. 3D integration offers several performance and security advantages, including extremely high bandwidth between the two dies and the ability to augment a processor with a separate die housing custom security features. This thesis performs a feasibility and requirements analysis of a data transformation coprocessor in a three-dimensional integrated circuit. We propose a novel coprocessor architecture in which one layer (control layer) houses application-specific coprocessors for cryptography and compression, which provide acceleration for applications running on a general-purpose processor in another layer (computational layer).