关键词：动态随机存取存储器（DRAM）；通信操作指令（SOI）；纳米
摘 要：Capacitorless dynamic random access memory (DRAM) is a promising solution to cellarea scalability and complex fabrication process issues for conventional DRAM.The thin body SOI transistor, which suppresses the short channel effect and also minimizes variability, is selected for the capacitorless DRAM cell structure. The impact of substrate doping concentration on capacitorless DRAM cell performance is studied and a novel selective well structure is proposed.