关键词：混合计量方案；虚拟计量校准；半导体
摘 要：Risk and cost must be balanced in the design of semiconductor processing metrology. More speci cally, one needs to balance the cost of operating the metrology tool, and the loss in terms of processing cost and yield due to the limited sampling and the time lapse between the occurrence and the correction of a process fault. In virtual metrology (VM), the real-time data produced by the processing tool (e.g. plasma etching data during isolation trench formation) is used to predict an outcome of the wafer (e.g. critical dimension of the trench) utilizing an empirical model.