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Chisel中的硬件建设

Hardware Construction in Chisel
作者:Huy Vo 作者单位:Electrical Engineering and Computer Sciences 加工时间:2013-11-06 信息来源:EECS 索取原文[24 页]
关键词:硬件建设;Chisel代码
摘 要:Chisel is designed to be a hardware construction language so any design in Chisel will always have a well defined mapping to low level hardware blocks. Chisel’s core programming features allow users to accurately describe hardware circuits and can be easily extended for higher level hardware designs. This paper categorizes Chisel hardware construction into three levels and discusses the merits and drawbacks of each level.
目 录:

1 Introduction

1.1 Related Works

1.2 Acknowledgments

2 Chisel

2.1 Node

2.2 Component

2.3 Backend

3 Basic Hardware Construction in Chisel

3.1 ListLookup

3.2 Vec

4 Advanced Hardware Construction in Chisel

4.1 ListLookup

4.2 Vec

5 Elaboration Time Hardware Construction

5.1 Elaboration Time Hardware Construction Interface

5.2 When

5.3 SRAM Backend

5.4 Automatic Pipeline Synthesis

6 Conclusion and Future Work

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