关键词：晶体管；绝缘体；InAs；TFET
摘 要：Described in the following report are a series of design decisions and experiments towards demonstrating a prototype bilayer InAs Tunneling Field E ect Transistor (TFET), a new type of transistor which could exhibit a steeper sub-threshold slope and could enable lower- power electronics. In the process of designing and fabricating this device, n-channel InAs on insulator MOSFETs were fabricated and characterized to better inform the TFET design and fabrication. While in this work, a TFET with the desired characteristics was never realized, others were able to demonstrate similar tunneling devices with poor subthreshold slopes. A simple model is presented which explains the sensitivity of the performance of the TFET to interface traps.